Yiting Wang

Yiting (Nelly) Wang

Ph.D. Student
Department of Electrical and Computer Engineering
University of Maryland, College Park

I am a Ph.D. student in Electrical and Computer Engineering at the University of Maryland, College Park. My research focuses on the intersection of artificial intelligence and hardware security, with particular emphasis on leveraging Large Language Models (LLMs) for Electronic Design Automation (EDA) and developing novel attack methodologies against cryptographic implementations.

I am co-advised by Prof. Gang Qu and Prof. Ang Li at University of Maryland. My work spans from theoretical foundations to practical implementations, including hardware security verification, side-channel attacks, and AI-driven design automation.

Research Interests

AI for EDA Hardware Security Large Language Models Side-Channel Attacks Post-Quantum Cryptography RTL Optimization Formal Verification

Latest News

December 2025 NEW!
Paper Accepted to NeurIPS 2025!
Our paper "SymRTLO: Enhancing RTL Code Optimization with LLMs and Neuron-Inspired Symbolic Reasoning" has been accepted for poster presentation at NeurIPS 2025. This work introduces novel approaches for hardware design optimization using large language models.
November 2025 NEW!
Paper Accepted to Asian HOST 2025!
Our paper "Auto-profiling Attack on NTT Hardware Implementations" (Authors: Yiting Wang, Zelin Lu, Gang Qu, and Md Tanvir Arafin) has been accepted to Asian HOST 2025. This work presents novel side-channel attack methodologies against Number Theoretic Transform implementations.
May 2024
🏆 2nd Place in Hardware Demo Competition!
Won 2nd place award in the hardware demo competition at IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2024) with the project "Belief Propagation Attack against NTT implementation on FPGA". Read more →

Selected Publications and Preprints

SymRTLO: Enhancing RTL Code Optimization with LLMs and Neuron-Inspired Symbolic Reasoning
Y Wang, W Ye, P Guo, Y He, Z Wang, B Tian, S He, G Sun, Z Shen, ...
NeurIPS 2025 (Poster)
arXiv Citations: 3
VeriReason: Reinforcement Learning with Testbench Feedback for Reasoning-Enhanced Verilog Generation
Y Wang, G Sun, W Ye, G Qu, A Li
arXiv preprint arXiv:2505.11849, 2025
arXiv Citations: 2
MCP4EDA: LLM-Powered Model Context Protocol RTL-to-GDSII Automation with Backend Aware Synthesis Optimization
Y Wang, W Ye, Y He, Y Chen, G Qu, A Li
arXiv preprint arXiv:2507.19570, 2025
arXiv Citations: 1
CoIn: Counting the Invisible Reasoning Tokens in Commercial Opaque LLM APIs
G Sun, Z Wang, B Tian, M Liu, Z Shen, S He, Y He, W Ye, Y Wang, A Li
arXiv preprint arXiv:2505.13778, 2025
arXiv Citations: 1
HADA: Leveraging Multi-Source Data to Train Large Language Models for Hardware Security Assertion Generation
W Fu, Y Wang, Z Lu, Y Zhao, X Guo, G Qu
7th ACM/IEEE International Symposium on Machine Learning for CAD, 2025
AutoEDA: Enabling EDA Flow Automation through Microservice-Based LLM Agents
Y Lu, HI Au, J Zhang, J Pan, Y Wang, A Li, J Zhang, Y Chen
arXiv preprint arXiv:2508.01012, 2025
arXiv
EvoVerilog: Large Language Model Assisted Evolution of Verilog Code
P Guo, Y Wang, W Ye, Y He, Z Wang, X Dai, A Li, Q Zhang
arXiv preprint arXiv:2508.13156, 2025
arXiv
Auto-profiling Attack on NTT Hardware Implementations
Yiting Wang, Zelin Lu, Gang Qu, Md Tanvir Arafin
Asian HOST 2025 (Accepted, Paper ID: 55)

Awards & Honors

🏆 2nd Place - Hardware Demo Competition
IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2024)
Project: "Belief Propagation Attack against NTT implementation on FPGA"

Contact

Office: Department of Electrical and Computer Engineering
University of Maryland, College Park
College Park, MD 20742

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